e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 1 / 8 general description the ELP3100 dc/dc converter integrates two low noise , high efficiency charge pumps for dual outputs , w hich consist of one inverting output and a step - up output. the device operates from 2.5 v to 4.8v input, a nd provides a step - up ou tput voltage (vp) of 2x the input voltage . the negative inverting output (vn) is - 1x inverted from the positive output vp. the ELP3100 is available in a small tdfn - 1 2 pin package that features a bottom side exposed thermal pad to provide optimal heat dissi pation . the small package size and low external parts count m ake the device ideally suit able for tft lcd applications of mobile products . the device is rated to operate from C 40 to +85 ambient temperature range . features ultra - l ow C noise f or rf application . 2.5 v to 4.8 v input supply voltage range . adaptive 1.5x / 2x mode switch over for positive . voltageand - 1xmodefornegativevoltage . vp output range : 5.4 v to 5.9v . vn output range : - 5.4 v to - 5.9v . high current output : vin = 3.3v,iout =120ma; built in power on sequence . tdfn - 12 1.5mmx2.4mm package applications mobile device , smart phone . portable media players / mp3 players . cellular and smart mobile phone . l cd pin assignments
e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 2 / 8 pin no. pin name description 1 c2p flying capacitor 2 positive terminal (c5). 2 vp positive output pin . 3 c1p flying capacitor 1 positive terminal (c4). 4 c1n flying capacitor 1 negative terminal (c4). 6 en device enable pin. 7 nc no connector. 8 vin input supply voltage . by pass vin with a low esr ceramic capacitor to gnd. 9 c3n flying capacitor 3 negative terminal (c6). 10 c3p flying capacitor 3 positive terminal (c6). 11 vn negative output pin. 12 c2n flying capacitor 2 negative terminal (c5). 5,13(pad) gnd ground pin . p in d escription ordering information ELP3100 device package marking marking information ELP3100 tdfn 12l lp3100 ywx 1. y p ackage type qv:tdf n - 12 f lead - free
e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 3 / 8 function block diagram typical 60ma application circuit
e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 4 / 8 typical 120ma application circuit absolute maximum ratings input / o utpt voltage to gnd ------------------------------------------------------------------------------ 0.3v to +6v en to gnd ------------------------------------------------------------------------------------------------- 0v to v in operating junction temperature range(tj) --------------------------------------------------- 40 to150 maximum soldering temperature(atleads,10sec) --------------------------------------------------------- 260 storage temperature range ---------------------------------- ------------------------------------- - 65cto150c operation ambient temperature range -------------------------------------------------------------- 0cto85c maximum power dissipation(pd,ta<40c) ----------------------------------------------------- ---------------- 1.5w thermal resistance(ja) ------------------------------------------------------------------------------------------- 68 /w electrical characteristics (v in =v en , c 1 =c 2 =c 3 = 10 uf,c 4 =c 5 =c 6 = 4.7 uf, typical values are t a =25 ) symbol parameter conditions min. typ. max. unit vin input voltage 2.5 4.8 v io output current positive output current 120 ma negative output current 120 vp positive output voltage e lp310 0 5. 4 5.9 v vn negative output voltage e lp310 0 - 5.9 - 5. 4 ishdn shut down current en=gnd,vin=3.6v 1 a fosc oscillator frequenc y i vp=ivn=10ma 300 khz vol en logic low 0.4 v voh en logic high 1.4 v ien en pin current 0.5 ua tsd thermal shut down temperature 145
e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 5 / 8 typical operation characteristics
e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 6 / 8
e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 7 / 8 application information the ELP3100 offers dual channel output voltage for p owering on sp ecified power in tft lcd panels . the device integrates a positive charge pump and a n egative charge pump. enable control(en) to turn on the ELP3100 , the en p in must be at logic high. when the en pin is pulled to a logic low, the device is disabled and the supply current reduces to less than 1 a. the ELP3100 positive charge pump provides an o utput voltage vp of 1.5x or 2x the input voltage. the positive charge pump uses two external flying c apacitors to generate the required output vol tage . for the selected output to input ratio, the charge p ump will configure the internal switches to charge t he flying capacitors. figure1shows the functional diagram of the positive charge pump . negativechargepumpcontroller the negative charge pump u ses one external flying capacitor to generate an inverted negative voltage that is C 1x of vp. figure 2 shows the functional block diagram of the negative charge pump . figure 2. negative charge pump functional block diagram layout consideration use a ground plane for the e lp310 0 device that can b e connected to the device expose pad and ground p in for optimal thermal characteristics . by pass capacitors place vin, vp, and vn by pass capacitors as close a s possible to the device pin. keep the ground traces f rom the by pass to the ground plane as short as possible.
e lp3100 dual channel charge pump power solution for tft lcd panel e - cmos corp. (ww w .e c mo s . c om.tw) 5k05n - rev. f001 8 / 8 flying capacitors place the flying capacitors as close to the device pins as possible to minimize trace noise since the f lying capacitors to t he pins will generate high t ransient voltage (dv /dt ) switching signals . package information
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